Instruction Classification and Addressing Mode计算机学院 李征
OICQ: 1340915 Assembler and Machine InstructionIn principle, assembler instruction correspond with machine instruction one by one.
However, there are few exceptions.
Because it is easy to remember, programmer only learn assembler instructions. Assembler and Machine InstructionThe syntax restriction in assembler instructions are introduced from corresponding machine instructions.
These syntax restrictions is decided by CPU architecture. Instruction CompositionOPR DEST, SRC
OPR: Operation Code to present instruction function
SRC: Source data for operation
DEST: Destination address for operation result, maybe provide source data too Instruction Classification (1)1) Instruction with two operation data
OPR DEST, SRC
DEST can be register, memory cell
SRC can be register, memory cell, immediate data (立即数) 1) Instruction with two operation dataDEST and SRC can be 8-bit or 16-bit.
The length of DEST and SRC must be consistent.
Only one memory cell can appear at DEST or SRC. 1) Instruction with two operation dataExample:
MOV AX, BX ;1 SRC, 1 DEST
MOV VAR1, BL
MOV AL, 08H
ADD AL, BL ;2 SRC, 1 DEST
MOV 32H, AL
MOV AL, 9A4BH
MOV VAR1, VAR2 ...